The present invention relates to a method for manufacturing a semiconductor device and more specifically to a fin transistor.
In a system with a plurality of semiconductor devices, a semiconductor memory is configured to store data generated or processed therein. For example, if a request from a data processor such as a central processing unit (CPU) is received, the semiconductor memory outputs data to the data processor from unit cells therein or stores data processed by the data processor to the unit cells, according to an address transmitted with the request.
Recently, the data storage capacity of the semiconductor memory has increased, but the size of the semiconductor memory chip has not increased proportionally. Thus, various elements and components used for read or write operations in the semiconductor memory have also reduced in size. Accordingly, components and elements duplicated unnecessarily in the semiconductor memory, such as transistors or wires, are combined or merged to lessen the area occupied by each component. Particularly, the reduction of the size of unit cells included in the semiconductor memory apparatus affects the level of integration.
A common type of semiconductor memory is Dynamic Random Access Memory (DRAM). DRAM is a type of volatile memory device configured to retain data while a power source is supplied. The unit cell comprises a transistor and a capacitor. As the design rule is reduced, the plane area where a capacitor can be formed is reduced. In order to stably store data, it is necessary to maintain the capacitance even with a shrinking capacitor. It is difficult to develop materials for creating an insulating film in the capacitor in order to improve the capacitance of the capacitor having a reduced area.
Also, as the design rule is reduced, the junction resistance value of the storage node (SN) and the turn-on resistance value of the transistor in the unit cell are increased; it becomes difficult to perform normal read and write operations; and refresh characteristics are deteriorated.
In order to improve the above-described shortcomings, a floating body transistor has been developed. That is, the unit cell of the semiconductor memory apparatus does not include a capacitor used for storing data, but stores data as a floating charge in the body of the transistor included in the unit cell. Due to the application of the floating body transistor, the unit cell is not required to include a capacitor. As a result, the unit cell size can be reduced.
However, the continuous reduction of the design rule limits the size of the floating body transistor. As a result, the length of the channel between the source and drain region in the floating body transistor becomes shorter.
Meanwhile, in order to enlarge the channel length of the transistor, a fin transistor that has a three-dimensional channel region is used. In order to prevent a short channel effect in the floating body transistor, a method for manufacturing the fin transistor that has a three-dimensional channel region over a silicon-on-insulator (SOI) substrate is used.
FIGS. 1a and 1b are cross-sectional diagrams illustrating a method for manufacturing a fin cell transistor formed over a SOI substrate of a semiconductor device.
Referring to FIG. 1a, a fin transistor is formed over a SOI substrate including a lower semiconductor substrate 110, a buried insulating film 120 and an upper silicon film 130. The fin transistor includes a portion of the upper silicon film 130 as a body, and further includes a gate pattern including a gate insulating film 140, a lower gate electrode 150, an upper gate electrode 160 and a gate hard mask insulating film 170. A spacer 180 is formed at sidewalls of the gate pattern. Impurities are doped at both sides of the gate pattern of the upper silicon film 130 to form a source and drain 190.
Although the lower gate electrode 150 of FIG. 1a obscures a fin region of the transistor, FIG. 1b that shows a cross-sectional view of I-I′ which illustrates a location of a fin region 130′. The fin region 130′ having a fin type for connecting the source and drain 190 disposed at both sides of the gate pattern is obtained by partially etching the upper silicon film 130, and surrounded by the gate insulating film 140 and the lower gate electrode 150. In the fin transistor, a channel is formed in the fin region 130′ depending on a potential of the lower gate electrode 150. The channel is formed to have a three-dimensional structure, thereby reducing a short channel effect. That is, the channel is formed to have a long length between the source and drain regions by using the three-dimensional fin region 130′. As a result, the channel length can be increased longer than a two-dimensional channel length.
However, the formation of the fin region 130′ reduces the size of the floating body of the floating body transistor in the SOI structure. In order to improve storage data, particularly a refresh characteristic, it is preferable to enlarge the volume of the floating body where data can be stored. However, the formation of the fin region 130′ inevitably reduces the volume of the floating body, which reduces the amount of charge that can be stored.
The SOI substrate includes an insulating film disposed between a semiconductor substrate and a silicon film so that the SOI substrate has the same characteristic as a capacitor structure. When charges move repeatedly through the body of the transistor, the charges are accumulated in the capacitor through generation and recombination of a bias and a carrier. The charges accumulated in the capacitor fluctuate a threshold voltage of the transistor and this is used to measure whether data is stored in the capacitor. Kink effect refers to a generation phenomenon of leakage current resulting from concentration of an electric field.
The floating body effect and Kink effect are affected by the amount of charges that can be accumulated in the floating body. When holes are continuously accumulated in the floating body due to data storage, a depletion region which becomes larger as the volume of the floating body becomes smaller is diffused in a shorter time period. As a result, the holes corresponding to data cannot be stored in the floating body transistor any longer.